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Chapter 3 - Full TOC

Sections

3. BASIC PROGRAMMING TECHNIQUES
3.1 INTRODUCTION
3.2 ARITHMETIC PROGRAMS
3.2.1 8-Bit Addition
3.2.2 16-Bit Addition
3.2.3 Subtracting 16-Bit Numbers
3.3 BCD ARITHMETIC
3.3.1 8-Bit BCD Addition
3.3.2 BCD Subtraction
3.3.3 16-Bit BCD Addition
3.3.4 Packed BCD Subtract
3.3.5 BCD Flags
3.3.6 Instruction Types

3.4 MULTIPLICATION
3.4.1 8-By-8 Multiplication
3.4.1.1 Important Self-Test
3.4.1.2 Programming Alternatives
3.4.1.3 Improved Multiplication Program
3.4.1.3.1 Step 1
3.4.1.3.2 Step 2
3.4.2 A 16 × 16 Multiplication
3.5 BINARY DIVISION
3.5.1 16-by-8 Division
3.5.2 8-Bit Division
3.5.3 Non-Restoring Division
3.6 LOGICAL OPERATIONS

3.7 INSTRUCTION SUMMARY
3.8 SUBROUTINES
3.8.1 Implementation of the Subroutine Mechanism
3.8.2 Z80 Subroutines
3.8.3 Subroutine Examples
3.8.4 Recursion
3.8.5 Subroutine Parameters
3.8.6 Subroutine Library
3.9 SUMMARY
3.10 ANSWERS TO EXERCISE 3.18 (MULTIPLICATION):

Exercises

Exercise 3.1, Exercise 3.2, Exercise 3.3, Exercise 3.4, Exercise 3.5, Exercise 3.6, Exercise 3.7, Exercise 3.8, Exercise 3.9, Exercise 3.10, Exercise 3.11, Exercise 3.12, Exercise 3.13, Exercise 3.14, Exercise 3.15, Exercise 3.16, Exercise 3.17, Exercise 3.18, Exercise 3.19, Exercise 3.20, Exercise 3.21, Exercise 3.22, Exercise 3.23, Exercise 3.24, Exercise 3.25, Exercise 3.26, Exercise 3.27, Exercise 3.28, Exercise 3.29, Exercise 3.30, Exercise 3.31, Exercise 3.32, Exercise 3.33, Exercise 3.34, Exercise 3.35

List of Figures

Fig. 3.0: The Z80 Registers
Fig. 3.1: Eight-Bit Addition RES = OP1 + OP2
Fig. 3.2: LD A, (ADR1): OP1 is Loaded from Memory
Fig. 3.3: ADD A, (HL)
Fig. 3.4: LD (ADR3), A (Save Accumulator in Memory)
Fig. 3.5: 16-Bit Addition - The Operands
Fig. 3.6: Storing Operands in Reverse Order
Fig. 3.7: Pointing to the High Byte
Fig. 3.8: A 32-Bit Addition
Fig. 3.9: 16-Bit Load - LD HL,(ADR1)
Fig. 3.10: Storing BCD Digits
Fig. 3.11: Packed BCD Subtract: N1 <- N2-N1
Fig. 3.12: The Basic Multiplication Algorithm - Flowchart
Fig. 3.13: 8 × 8 Multiplication Program
Fig. 3.14: 8 × 8 Multiplication - The Registers
Fig. 3.15: LD BC, (MPRAD)
Fig. 3.16: LD DE, (MPDAD)
Fig. 3.17: Shift and Rotate
Fig. 3.18: Shifting from E into D
Fig. 3.19: Form for Multiplication Exercise
Fig. 3.20: Multiplication: After One Instruction

Fig. 3.21: Multiplication: After Two Instructions
Fig. 3.22: Multiplication: After Five Instructions
Fig. 3.23: One Pass Through The Loop
Fig. 3.24: Improved Multiply, Step 1
Fig. 3.25: Registers for Improved Multiply
Fig. 3.26: Improved Multiply, Step 2
Fig. 3.27: 16 × 16 Multiply - The Registers
Fig. 3.28: 16 × 16 Multiplication Program
Fig. 3.29: 16 × 16 Multiply with 32-Bit Result
Fig. 3.30: 8-Bit Binary Division Flowchart
Fig. 3.31: 16/8 Division - The Registers
Fig. 3.32: 16/8 Division Program
Fig. 3.33: Form for Division Program
Fig. 3.34: Non-Restoring Division - The Registers
Fig. 3.35: Subroutine Calls
Fig. 3.36: Nested Calls
Fig. 3.37: The Subroutine Calls
Fig. 3.38: Stack vs. Time
Fig. 3.39: Multiplication: A Complete Trace
Fig. 3.40: The Multiplication Program (Hex)
Fig. 3.41: Two Iterations Throught the Loop