ADC HL,ss
HL + ss + C| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | s | s | 1 | 0 | 1 | 0 |
- BC
- 00
- DE
- 01
- HL
- 10
- SP
- 11
ADC HL,ss
| ss: | BC | DE | HL | SP |
|---|---|---|---|---|
| ED + | 4A | 5A | 6A | 7A |
ADC HL,DE
OBJECT CODE
ADC HL,ss |
Add with carry HL and register pair ss. |
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| Function: | HL
HL + ss + C |
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| Format: |
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byte 1: ED |
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byte 2 |
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| Description: | The contents of the HL register pair are added to the contents of the specified register pair, and then the contents of the carry flag are added. The final result is stored back in HL. ss may be any of:
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| Data Flow: | |
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| Timing: | 4 M cycles; 15 T states: 75 usec @ 2 MHz |
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| Addressing Mode: | implicit |
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| Byte Codes: | ADC HL,ss
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| Flags: | |
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| Example: | ADC HL,DE |
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OBJECT CODE |
Before: |
After: |
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