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OTIR

Block output with increment.
Function: (C) <- (HL); B <- B - 1; HL <- HL + 1
Repeat until B = 0
 
Format:
1110 1101
 
byte 1: ED
 
1011 0011
 
byte 2: B3
 
Description: The contents of the memory location addressed by the HL register pair are output to the peripheral device addressed by the contents of the C register. The B register is decremented and the HL register pair is incremented. If B != 0, the program counter is decremented by 2 and the instruction is re-executed. C supplies bits A0 to A7 of the address bus. B supplies (after decrementation) bits A8 to A15.
 
Data Flow:
 
Timing: B = 0: 4 M cycles; 16 T states: 8 usec @ 2 MHz
B != 0: 5 M cycles; 21 T states: 10.5 usec @ 2 MHz
 
Addressing Mode: external
 
Flags:
 
Example:
OTIR

OBJECT CODE
Before:
 
After: