RES b,s |
Reset bit b of operand s. |
| Function: |
sb
0
|
| Format: |
s: may be r, (HL), (IX + d), (IY + d)
|
r
|
|
byte 1: CB
|
|
|
byte 2
|
(HL)
|
|
byte 1: CB
|
|
|
byte 2
|
(IX + d)
|
|
byte 1: DD
|
|
|
byte 2: CB
|
|
|
byte 3: offset data
|
|
|
byte 4
|
(IY + d)
|
|
byte 1: FD
|
|
|
byte 2: CB
|
|
|
byte 3: offset data
|
|
|
byte 4
|
|
b may be any one of:
- 0
- 000
- 1
- 001
- 2
- 010
- 3
- 011
- 4
- 100
- 5
- 101
- 6
- 110
- 7
- 111
|
r may be any one of:
- A
- 111
- B
- 000
- C
- 001
- D
- 010
- E
- 011
- H
- 100
- L
- 101
|
| Description: |
The specified bit of the location determined by s is reset. s is defined in the description of the similar BIT instructions.
|
| Data Flow: |
|
| Timing: |
| s: |
M cycles: |
T states: |
usec
@ 2 MHz: |
r
(HL)
(IX + d)
(IY + d) |
2
4
6
6 |
8
15
23
23 |
4
7.5
11.5
11.5 |
|
| Addressing Mode: |
r: implicit; (HL): indirect; (IX + d), (IY+d): indexed.
|
| Byte Codes: |
RES b,r
| r: | A | B | C | D | E | H | L |
|---|
| CB + | b: | 0 | 87 | 80 | 81 | 82 | 83 | 84 | 85 |
|---|
| 1 | 8F | 88 | 89 | 8A | 8B | 8C | 8D |
| 2 | 97 | 90 | 91 | 92 | 93 | 94 | 95 |
| 3 | 9F | 98 | 99 | 9A | 9B | 9C | 9D |
| 4 | A7 | A0 | A1 | A2 | A3 | A4 | A5 |
| 5 | AF | A8 | A9 | AA | AB | AC | AD |
| 6 | B7 | B0 | B1 | B2 | B3 | B4 | B5 |
| 7 | BF | B8 | B9 | BA | BB | BC | BD |
|
|
| b: | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
|---|
RES b,(HL) | CB + | 86 | 8E | 96 | 9E | A6 | AE | B6 | BE |
|---|
RES b,(IX + d) | DDCB + |
|---|
RES b,(IY + d) | FDCB + |
|---|
|
| Flags: |
|
(no effect)
|
| Example: |
RES 1,H |
OBJECT CODE |
Before:
|
After:
|
|
|